• Overview
  • Specification
  • Block diagram
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The HSDAC_XMC_BOARD is a single channel D/A XMC utilizing a 12-bit D/A device by Euvis at maximum rate of 8Gps (maximum rate : 10 Gps). The sample clock can be supplied externally (up to 4 GHz) or generated on board (optionally locked to an external supplies reference). Additionally a trigger input for customized sampling control is available. The HSDAC_XMC daughter card is mechanically and electrically compilant whit XMC standard (ANSI/VITA 42.3). The card has P15 connector and can be used in conduction cooled enviroment as well a convection (air) cooled enviroment. The HSDAC_XMC card is equipped whit power supply and temperature monitoring whit several power-down modes to switch off unused function, reducing system level power heat.


Waveform Generation.
Software defined radio (SDR).
Medical equipment.
Aerospace and test instrumentation.


Features :

Single channel 12-bit 8Gsp D/A convertion.:


FPGA : VIRTEX-6 by Xilinx:

VITA 42.3 compilant;

LVDS I/O Signaling (Vadj);

Single Ended DC-coupled analog output;

P15 Connector;

Single Ended DC-coupled analog output;

Power-down modes to switch off unused functions

for system power saving;

Sampling Frequency through I2C;

Flexible clock tree enables

internal samplig clock;

external reference and samplig clock;

Front panle SSMC connectors.

Mil-I-46058c Conformal Coating Compilant (Optional).

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