• Overview
  • Specification
  • Block Diagram
  • Ordering
The IF Adapter 2 is a high performance Analog to Digital Front End for the Signal Processor Modules.
Two analog channels are provided, with two high speed A/D converters and two inputs for trigger or clock.
The A/D Converters outputs and the trigger/clock signals are connected to the FPGA inputs of the PMC Processor Module; the A/D Clocks are provided through the FPGA from internal or external clock inputs.

Analog Channel Input:

SMA Coax Connector, 50/75 Ω terminated 0.6-0.8  Vpp Input

Analog to Digital Converter:

National Semiconductor ADC081500: 8bit, 1/1,5 GSPS

DSP _RAM : 128/256 MBytes DDR2 RAM, 16 MBytes FLASH EPROM,Std., 16 MBytes FLASH EPROM

Analog Digital Converter:

Linear LTC2254 : 14 bit, 105 Msps max

Trigger/Ref. Clock Input:

SMA Coax Connector, 50/75 Ω terminated 3,5 ± 2 V  High Input, 0 ± 0,5 V  Low Input  60 MHz max. freq.

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