• overview
  • specification
  • block diagram
  • ordering
The IF Adapter 1 is a high performance Analog to Digital Front End for the Signal Processor Modules.
Two analog channels are provided, with two high speed A/D converters and two inputs for  trigger or clock.
The A/D Converters outputs and the trigger/clock signals are connected to the FPGA inputs of the PMC Processor Module; the A/D Clocks are provided through the FPGA from internal or external clock inputs.

Analog Channel Input:

SMA Coax Connector, 50/75 Ω terminated 1 Vpp Input

Analog Filter:

3-Pole Multiple Feedback Filter

DSP _RAM : 128/256 MBytes DDR2 RAM, 16 MBytes FLASH EPROM,Std., 16 MBytes FLASH EPROM

Analog Digital Converter:

Linear LTC2254 : 14 bit, 105 Msps max

Trigger/Clock Input:

SMA Coax Connector, 50/75 Ω terminated 3,5 ± 2 V  High Input, 0 ± 0,5 V  Low Input 60 MHz max. freq.

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